Thyristor Switch with Combined Commutating Inductance
Abstract Generated abstract
This paper analyzes switching processes in a thyristor circuit breaker that uses a saturable commutating reactor shunted by a linear inductance and diode, a configuration previously proposed but not analytically treated in the cited literature. The authors derive equations for capacitor recharging and core remagnetization during operation with an active-inductive load, identify operating modes associated with partial and full hysteresis-loop remagnetization, and give expressions for interval durations and design conditions. The analysis indicates that the shunted arrangement can extend the thyristor conducting interval by more than 1.5 times, improve utilization of the saturable reactor core, and reduce direct current surges through the thyristor. The resulting formulas are presented as suitable for engineering calculations of converters.
Full Text
PROCEEDINGS
OF THE TOMSK ORDER OF THE OCTOBER REVOLUTION
AND ORDER OF THE RED BANNER OF LABOR
POLYTECHNIC INSTITUTE named after S. M. KIROV
Vol. 262 1973
THYRISTOR CIRCUIT BREAKER WITH COMBINED COMMUTATING INDUCTANCE
V. N. MISHIN, V. P. LAIER, Yu. N. BUCHENKO
(Submitted by the Scientific and Technical Seminar of the NII AEM)
Thyristor circuit breakers with combined commutating inductance, i.e., with shunting of the commutating saturable-core choke, made on a core with a rectangular hysteresis loop (RHL), by a linear inductance and a diode, were proposed by Morgan [1]. However, the literature contains no analysis of the processes in such circuit breakers.
Let us consider the processes in the circuit breaker shown in Fig. 1 when operating into an active-inductive load.
We shall begin the analysis from the moment the turn-off pulse is applied to thyristor \(T\), after which resonant recharging of capacitance \(C\) through inductance \(L_2\) and a diode begins. Neglecting the magnetization of choke \(L_1\) and the losses in the commutating circuit, we obtain the dynamic equation for the capacitor-recharging stage
\[ L_2 C \frac{d^2 U_c}{dt^2} + U_c = 0. \tag{1} \]
Fig. 1
The solution of (1) for the voltage and current of the commutating capacitance under the initial conditions \(U_{(0)}=-U_0\) and \(i_{(0)}=0\) is
\[ 0 \le t \le t_1 \begin{cases} U_c = -U_0 \cos \omega_1 t,\\ i_c = U_0 C \omega_1 \sin \omega_1 t, \end{cases} \tag{2} \tag{3} \]
where \(\omega_1=\dfrac{1}{\sqrt{L_2 C}}\) is the angular frequency of the commutation circuit for \(|B|<B_s\).
With an unsaturated core of inductance \(L_1\), i.e., for \(|B|<B_s\),
\[ U_{L_1}=N_1 S \frac{dB}{dt}-U_c. \tag{4} \]
The solution of (4) with respect to induction for \(B_{(0)}=B_s\) is
\[ B = B_s - \frac{U_0}{N_1 S}\sqrt{L_2 C}\,\sin \omega_1 t. \tag{5} \]
The core remagnetization time is
\[ t=\sqrt{L_2C}\cdot \arcsin \frac{\Delta BN_1S}{U_0\sqrt{L_2C}}. \tag{6} \]
It follows from (6) that, depending on the magnetic state of the core, two operating modes are possible:
1) for
\[ \frac{\Delta BN_1S}{U_0}<\sqrt{L_2C} \]
— remagnetization along partial hysteresis loops, i.e., without the core entering the region of “negative” saturations (Fig. 2);
Fig. 2
2) for
\[ \frac{\Delta BN_1S}{U_0}>\sqrt{L_2C} \]
— remagnetization along the full hysteresis loop at \(\Delta B=2B_s\).
The best utilization of the choke-core material will occur in the second mode under the condition that
\[ \frac{t_0}{\sqrt{L_2C}}=1, \tag{7} \]
where
\[ t_0=\frac{2B_sN_1S}{U_0} \]
is the time of core remagnetization along the full hysteresis loop in the absence of the shunting circuit D1, \(L_2\).
Then the maximum pulse duration
\[ t_{\max}=\frac{\pi}{2}\sqrt{L_2C}. \tag{8} \]
Shunting the saturating reactor with a linear inductance makes it possible to increase the effectiveness of the use of the saturating reactor by more than a factor of 1.5 and to reduce the current surges through the thyristor that occur when \(L_1\) saturates in the first time interval [2]. In the general case, the duration of the first interval from (6) is
\[ t_1=\sqrt{L_2C}\arcsin\frac{2B_sN_1S}{U_0\sqrt{L_2C}}. \tag{9} \]
For
\[ \frac{2B_sN_1S}{U_0}<\sqrt{L_2C} \]
an oscillatory recharge of the capacitance will occur with frequency \(\omega_2\gg\omega_1\), since saturation of the core will occur before the voltage on the capacitor reaches its zero value. The change in voltage and current of the commutating capacitance in the second interval is described by expressions (2) and (3), but with
\[ \omega=\omega_2=\frac{1}{\sqrt{L_{1s}C}}. \]
The inductance of the saturated core, \(L_{1s}\ll L_2\), can be calculated from the geometrical dimensions of the winding as for a winding without a core [2].
\[ \begin{aligned} &u_c=-U_c(t_1)\cos\omega_2(t-t_1),\\ &i_c=u_c(t_1)C\omega_2\sin\omega_2(t-t_1) \end{aligned} \qquad \left\{\,t_1\le t\le t_2.\right. \]
With a sufficient degree of accuracy, the time interval \(\Delta t_2=t_2-t_1\) may be taken equal to
\[ \Delta t_2=\pi\sqrt{L_{1s}C}. \tag{10} \]
In the third interval the capacitor is recharged by the energy stored in the inductance \(L_2\). It is not difficult to show that the duration of the third interval can be determined according to expression (9), since the intervals \(\Delta t_1\) and \(\Delta t_3\) are interconnected by the total induction swing \(\Delta B=2B_s\).
At \(t=t_3\), saturation of the core \(L_1\) and turn-off of the thyristor occur. The further nature of the processes in the breaker has been widely covered in the literature [2, 3]. The timing diagrams in Fig. 2 illustrate the nature of the processes. The solid curves in Fig. 2a, b show the change in voltage and current of the commutating capacitance when the saturating reactor is shunted by a linear inductance, while the dashed lines show the case in which the inductance \(L_2\) is absent. For greater clarity, the time intervals \(\Delta t_1\) and \(\Delta t_3\) for both variants have been made to coincide.
Thus, shunting the saturating reactor with a linear inductance and a diode makes it possible to increase the conducting interval of the thyristor by more than a factor of 1.5, i.e., to make better use of the saturating reactor, and reduces direct current surges through the thyristor.
The expressions obtained in this work can be used in engineering practice in the calculation of converters.
References
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R. Morgan. Time ratio control and inverter power circuits. U.S. Patent No. 3,360,712, 1967.
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B. Bedford, R. Hoft. Theory of Autonomous Inverters. Moscow, 1970.
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V. V. Topelberg. A thyristor DC-voltage regulator with a saturable reactor. Collected Papers of the Krzhizhanovsky Institute. Moscow, “Nauka,” 1970, pp. 32–41.
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V. P. Laier, V. N. Mishin, Yu. P. Serdyukov. Analysis of the operation of a stabilized frequency-pulse converter with linear commutating inductance. Proceedings of the VII Scientific and Technical Conference of TPI. Tomsk, 1971.