BROADBAND INDUCTIVE VOLTAGE DIVIDERS

A. I. Kramnyuk, M. S. Roitman

(Presented by the scientific seminar of the Department of Radio Engineering)

On the basis of work [1], it is possible to formulate the requirements that must be met in designing broadband inductive dividers (ID).

First, it is necessary to ensure equality of the equivalent capacitances referred to the individual windings. Moreover, it is desirable to satisfy this condition without the use of additional correcting capacitances.

Second, the values of the referred capacitances should, if possible, be minimal, so that a sharp decrease in the input resistance of a decade is not observed at the upper frequencies.

One effective solution to the problem posed is the ladder winding of dividers proposed by us [2, 3].

Its essence is as follows.

Suppose that several sections are wound on one core, having strictly the same number of turns. Each section is made as a bundle consisting of several uniformly twisted wires, which form separate windings connected in accordance and in series*). Since the individual sections are made as bundles, they are already known dividers and were considered in [1]. For them, the capacitance values at each individual winding can be written in the form

\[ C'_{\mathrm{eqv}_1}=K_1 C_{2/2}; \]

\[ C'_{\mathrm{eqv}_2}=K_2 C_{2/2}; \]

\[ C'_{\mathrm{eqv}_3}=K_1 C_{2/2}, \]

where \(C'_{\mathrm{eqv}_1}\), \(C'_{\mathrm{eqv}_2}\), \(C'_{\mathrm{eqv}_3}\) are the capacitance values referred to the first, second, and third winding of each section; \(C_{2/2}\) is the value of the distributed capacitance between two wires; \(K_1\), \(K_2\) are recalculation coefficients [1]. Analogous relations can also be written for other sections located on the same core.

Further, shifting the leads of each subsequent section by one winding relative to the preceding one and connecting all leads that have turned out to be on

*) For simplicity, we shall restrict ourselves to bundles made of three wires. However, the reasoning given is valid for dividers in which the bundles are made, in principle, of any number of wires.

of one line (Fig. 1), we obtain a circuit for which the total values of the capacitances of the individual windings are determined by the relations:

\[ \begin{aligned} C_{\text{eqv}_1} &= K_1 C_{2/2};\\ C_{\text{eqv}_2} &= K_2 C_{2/2}+K_1 C_{2/2};\\ C_{\text{eqv}_3} &= K_1 C_{2/2}+K_2 C_{2/2}K_1 C_{2/2};\\ C_{\text{eqv}_4} &= K_1 C_{2/2}+K_2 C_{2/2}+K_1 C_{2/2};\\ C_{\text{eqv}_5} &\qquad\quad K_1 C_{2/2}+K_2 C_{2/2}+\ldots\\ C_{\text{eqv}_6} &\qquad\qquad\qquad K_1 C_{2/2}+\ldots\\ C_{\text{eqv}_7} &\ .\ .\ .\ .\ .\ .\ .\ .\ .\ .\ .\ .\ .\ . \end{aligned} \tag{1} \]

As is evident from (1), the total values of the capacitances of the windings, beginning with the third, are equal to one another. Thus, the necessary condition for ensuring the broadband performance of the inductive divider has been fulfilled—the equality of the equivalent capacitances referred to the individual windings has been achieved, and without the use of correcting capacitances. With such a construction of the dividers, high division accuracy is simultaneously preserved owing to the galvanic connection between the individual windings.

In an analogous manner, dividers can be made using harnesses consisting of two, four, five, etc., wires. The use of harnesses consisting of more than two wires makes it possible, to some extent, to reduce the error of the inductive divider, but the technological difficulties that arise in this case, as well as the sharp increase in input capacitance, nullify the effect achieved. Therefore, for practical application the most acceptable dividers are those made with a two-wire harness (Fig. 2). In this case the end leads in them are not used,

Fig. 1

Fig. 2

since the equivalent capacitances referred to the end windings are not equal to the capacitances referred to all the remaining windings.

When the ladder type of winding is used, it is fairly easy to obtain dividers having any required number of output-voltage graduations by increasing or decreasing the number of sections.

But even when a ladder-type winding is used, in actual dividers the values of the capacitances shunting the individual windings are not exactly equal to one another. This is caused by the presence of parasitic capacitances with respect to the shield and the magnetic core, and there are also parasitic capacitances between the individual windings; i.e., to some extent there is an effect characteristic of the known method of winding dividers. Therefore, in order to obtain an IVD with high metrological characteristics, it is necessary to use additional correcting capacitances. In view of the considerable difficulty of determining the various parasitic capacitances, a calculation-and-experimental method for correcting an IVD is presented below.

The equivalent capacitances shunting the individual windings of the divider can be represented as the sum of two capacitances: \(C_0\), constant for all windings and equal to the minimum value of the capacitance present in the given system, and \(C_1\)—\(C_{10}\), which take into account the excess of the capacitance shunting the given winding over \(C_0\). Since \(C_0\) is connected to each winding and has no effect on the frequency error, it may be disregarded. Only the values \(C_1\)—\(C_{10}\) are of interest (Fig. 3).

By comparing the divider under investigation with a standard one, it is possible experimentally to select, for each of the taps, a correcting capacitance that fully compensates the frequency error. Figure 3 shows the connection of such a capacitance for tap 0.1—\(C_{01}\), and for 0.4 (dashed line)—\(C_{04}\). If the decade is placed in a shield and loaded with the corresponding load, then, in selecting the correcting capacitances, the indicated factors will be taken into account automatically.

Fig. 3.

To ensure frequency independence of the voltage at tap 0.1, the following condition must be satisfied:

\[ \frac{\displaystyle\sum_{k=2}^{10} C_k}{9}=C_1+C_{01}. \]

For tap 0.2,

\[ \frac{\displaystyle\sum_{k=3}^{10} C_k}{8} = \frac{\displaystyle\sum_{k=1}^{2} C_k}{2} +2C_{02}. \]

For the remaining taps, similarly,

\[ \frac{\displaystyle\sum_{k=4}^{10} C_k}{7} = \frac{\displaystyle\sum_{k=1}^{3} C_k}{3} +3C_{03}; \]

\[ \begin{gathered} \frac{\displaystyle \sum_{k=5}^{10} C_k}{6} = \frac{\displaystyle \sum_{k=1}^{4} C_k}{4} + 4C_{o4}; \\[6pt] \frac{\displaystyle \sum_{k=6}^{10} C_k}{5} = \frac{\displaystyle \sum_{k=1}^{5} C_k}{5} + 5C_{o5}; \\[6pt] \frac{\displaystyle \sum_{k=7}^{10} C_k}{4} = \frac{\displaystyle \sum_{k=1}^{6} C_k}{6} + 6C_{o6}; \\[6pt] \frac{\displaystyle \sum_{k=8}^{10} C_k}{3} = \frac{\displaystyle \sum_{k=1}^{7} C_k}{7} + 7C_{o7}; \\[6pt] \frac{\displaystyle \sum_{k=9}^{10} C_k}{2} = \frac{\displaystyle \sum_{k=1}^{8} C_k}{8} + 8C_{o8}; \\[6pt] \frac{C_{10}}{1} = \frac{\displaystyle \sum_{k=1}^{9} C_k}{9} + 9C_{o9}. \end{gathered} \tag{2} \]

After transformation, the system is reduced to the form

\[ \begin{aligned} C_2 &= C_1 + 1.8C_{c1} - 3.2C_{c2};\\ C_3 &= C_1 + 0.9C_{o1} + 3.2C_{o2} - 6.3C_{o3};\\ C_4 &= C_1 + 0.9C_{o1} + 6.3C_{o3} - 9.6C_{o4};\\ C_5 &= C_1 + 0.9C_{o1} + 9.6C_{o4} - 12.5C_{o5};\\ C_6 &= C_1 + 0.9C_{o1} + 12.5C_{o5} - 14.4C_{o6};\\ C_7 &= C_1 + 0.9C_{o1} + 14.4C_{o6} - 14.7C_{o7};\\ C_8 &= C_1 + 0.9C_{o1} + 14.7C_{o7} - 12.8C_{o8};\\ C_9 &= C_1 + 0.9C_{o1} + 12.8C_{o8} - 8.1C_{o9};\\ C_{10} &= C_1 + 0.9C_{o1} + 8.1C_{o9}. \end{aligned} \tag{3} \]

In the process of selecting the correcting capacitances, a variant is possible in which the indicated capacitance must be connected to a potential terminal \(C'_{o7}\) (Fig. 3). It is not difficult to show that the value \(C_{on_i}\) required for (3) is determined from the expression

\[ C_{on_i} = - C'_{on_i}\frac{10-n_i}{n_i}, \]

and, for the example given,

\[ C_{c7} = - C'_{o7}\frac{3}{7}. \]

Since in system (3) the number of equations is smaller than the number of unknowns, \(C_1\) is taken to be of such magnitude that the values \(C_2\)—\(C_{10}\) are positive and have a minimum value. The magnitudes of the correcting capacitances are chosen so that, together with the corresponding cap-

of the decade was equal to the capacitance having the maximum value (among \(C_1 \div C_{10}\)).

With the aid of correcting elements it is possible to eliminate the influence of such factors as the presence of interturn capacitance \((C_{2/2})\), capacitance with respect to the magnetic core \((C_m)\), and to attenuate the influence of the self-capacitance with respect to the shield and of the input capacitance of the following decade. At the same time, the main role is played by the presence of \(C_{нi}\) (load capacitance), for which compensation is achieved only in those decades that are connected at one end to the common conductor. For the remaining decades, the circuits used have almost no effect. To ensure frequency independence of the IVD for any values of the division factor, a very large number of correcting elements would be required. Thus, for a five-decade divider their number reaches \(10^5\), which, naturally, is practically infeasible. New solutions are needed that make it possible to cope successfully with the problem posed. Below we consider IVDs proposed by the authors, in which the influence of \(C_{нi}\) is sharply reduced for all decades and for any division factors [4].

Figure 4 shows the circuit of one decade operating into a capacitive load \(C_{нi}\). In this case the influence of the load would be eliminated if the condition were fulfilled that the current in the circuit \(a—a'\) is equal to 0.

For this it is necessary to make the potential of point \(a\) equal to the potential of point \(a'\). The potentials of the indicated points can be equalized if

Fig. 4

point \(a\), through a capacitance equal in value to \(C_{нi}\), is connected to an emf source whose magnitude is equal to \(2U_{\text{out}}\) and which is in phase with the output voltage. The current in the circuit \(a—a'\) is equal to zero, and \(C_{нi}\) will not load the decade, i.e., neutralization of the load capacitance takes place.

A source with twice the value of the output voltage can be obtained by using an additional divider (Fig. 5), in which the input voltage is applied not to the entire winding, but only to its half*). If the decades of the dividers are switched synchronously, i.e., by one switch, the output voltage from the additional divi-

*) The input voltage to the additional divider may be applied not to half of the winding \((n_{\text{add}} = 5)\), but to any output. In this case the value of the compensating capacitance \(C\) is determined from the expression

\[ C = \frac{n_{\text{add}}}{10 - n_{\text{add}}}\cdot C_{нi} \]

and for the case considered \((n_{\text{add}} = 5)\), \(C = C_{нi}\).

will always be twice the output voltage of the main divider.

To eliminate parasitic capacitances in multidecade dividers, it is necessary to have an additional divider with the same number of decades as the main one (Fig. 5). In this case the additional capacitances are connected between the “ground” terminals of the corresponding decades, except for the first ones, and between the output terminals of both dividers. They are selected as follows: the capacitance connected between the output terminals \((C)\) is equal to the load capacitance of the divider; the capacitances connected between decades \((C_1, C_2, C_3, \ldots)\) are equal in value to the capacitance of the corresponding decades of the main divider relative to the shield.

The application of the principles considered for constructing an inductive divider made it possible to create a divider with the following technical characteristics:

Fig. 5

1. Operating-frequency range: \(20\ \mathrm{Hz} \div 200\ \mathrm{kHz}\).

2. Division ratio from 1 to \(10^5\).

3. The number of decades of the instrument is 5, with decade discreteness
   \(10^{-1},\ 10^{-2},\ 10^{-3},\ 10^{-4},\ 10^{-5}\).

4. The basic error of the division ratio at a frequency of \(1\ \mathrm{kHz}\), with an active load \((R_\mathrm{l})\) of more than \(1\ \mathrm{M\Omega}\) and load capacitance from 0 to \(50\ \mathrm{pF}\), must not exceed the value: \(10^{-5} \div 2 \cdot 10^{-6} K\), where

\[ K = \frac{U_{\mathrm{in}}}{U_{\mathrm{out}}} \]

(the division ratio).

1. The basic error of the division ratio \((\delta_2)\) for \(R_\mathrm{l} > 1\ \mathrm{M\Omega}\) and \(C_\mathrm{l}\) from 0 to \(50\ \mathrm{pF}\) does not exceed the following values:

a) in the frequency range \(1\ \mathrm{kHz} \div 200\ \mathrm{kHz}\),

\[ \delta_2 = \delta_1 + \delta_f, \]

where \(\delta_1\) is the value of the basic error at a frequency of \(1\ \mathrm{kHz}\), and \(\delta_f\) is determined from the expression

\[ \delta_f = 10^{-8}\left[(f - 1)k + 5(f - 1)^2\right], \]

where \(f\) is the frequency \([\mathrm{kHz}]\);

b) in the frequency range \(20\ \mathrm{Hz} \div 1\ \mathrm{kHz}\), it is determined from the expression

\[ \delta_3 = \delta_1 + 6 \cdot 10^{-4}(1 - f\ \mathrm{kHz})^2. \]

1. The basic error of the division ratio with load capacitance from 0 to \(200\ \mathrm{pF}\) corresponds to items 4 and 5, provided that external correcting capacitances are connected.

1. The maximum permissible input voltage (rms value) is not less than \(\dfrac{f[Hz]}{4}\), but not more than \(100\ V\).

2. The maximum value of the phase shift over the entire frequency range is determined from the expression (calculated value)

\[ \Delta \varphi_{\max}=0.1^\circ + 5^\circ \cdot 10^{-5}\cdot k . \]

1. The nonlinear-distortion coefficient at the maximum permissible value of the input voltage is determined from the expression

\[ k_f[\%]=0.015\,R_i[ohm], \]

where \(R_i\) is the value of the output resistance of the signal source.

1. The feedthrough voltage over the entire frequency range does not exceed the value

\[ U_{\text{feed}}[V]=2\cdot 10^{-6}\cdot U_{\text{in}}[V]. \]

1. The magnitude of the input resistance in the frequency range \(20\ Hz\div100\ kHz\) is not less than \(1\ kOhm\); in the range \(100\div200\ kHz\), not less than \(500\ ohm\).

2. The maximum value of the active output resistance over the entire frequency range does not exceed \(5\ ohm\).

References

1. A. I. Kramnyuk, M. S. Roitman. Expansion of the operating range of inductive dividers. Tomsk State University Publishing House, Tomsk, Proceedings of the Tomsk Polytechnic Institute, vol. 231, 1971.

2. “Standard sources of alternating voltages.” R&D report “Vereteno,” R&D project “Vitamin,” deposited manuscript. State registration No. 68021571, No. 68021579.

3. A. I. Kramnyuk. Broadband inductive divider. Decision on issuance of an inventor’s certificate for application No. 1299427/26-9 of January 22, 1969.

4. A. I. Kramnyuk. Broadband inductive voltage divider. Inventor’s certificate No. 322723. Bulletin of Inventions, No. 36, 1971.